The delivered solution enables quality evaluation of up to 10Gbit serial buses (PCIe Gen1/2/3, SATA, optical fiber channel, etc) with a help of powerful FPGA-embedded instrumentation technology. The technology is capable to measure Bit-Error Rate (BER) characteristic for high-speed digital data transmission links as well as to plot so-called BER eye diagram. The latter feature directly fits for mass-production testing since allows every manufactured product to be quickly checked for potential problems on high-speed channels.
Today, an average family spends over 50 Euros of hidden costs annually on No-Failure-Found (NFF) investigations - a known problem of an unknown origin. Tomorrow, the electronic engine control system in a car will be dying after three-five years of operation due to CMOS aging. Actions are urgently needed!
Testonica Lab has released universal virtual embedded instrument IP capable to measure frequencies of high-speed clock signals connected to FPGA device. The developed technology offers an easy way of checking frequencies of on-board oscillators without the need of using any kind of external test and measurement equipment. The method does not involve usage of external nail probes or any other means of physical access to oscillator’s pin.